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.The approach usedhere is to shift the COND bits into IR[13] one bit at a time, and then jump todifferent locations in the microcode depending on the COND bit pattern.For branch instructions, the DECODE operation on line 2 of the microprogramtransfers control to location 1088.We need more space for the branch instruc-tions than the four-word per instruction allocation, so line 1088 transfers controlto line 2 which is the starting address of a large section of available control storememory.Lines 2 4 extract the 22-bit displacement for the branch by zeroing the highorder 10 bits and storing the result in %temp0.This is accomplished by shifting%ir to the left by 10 bits and storing it in %temp0, and then shifting the resultback to the right by 10 bits.(Notice that sign extension is performed on the dis-placement, which may be negative.RSHIFT5 implements sign extension.) Lines5 7 shift %ir to the right by 15 bits so that the most significant COND bit(IR[28]) lines up in position IR[13], which allows the Jump on IR[13]=1operation to test each bit.Alternatively, we could shift the COND field toIR[31] one bit at a time, and use the Jump on n condition to test each bit.(Note that there is a subtle error in how the PC is updated in line 12.See Prob-lem 6.21 for an explanation.)Line 8 starts the branch decoding process, which is summarized in Figure 6-16.If IR[28], which is now in IR[13], is set to 1, then the instruction is ba,which is executed in line 12.Notice that control returns to line 0, rather than toline 2047, so that the PC does not get changed twice for the same instruction. CHAPTER 6 DATAPATH AND CONTROL 221Line 8 IR[28]01IR[27] Line 9Line 12 ba01IR[26] Line 13be Line 10cond01branch282726250 0 0 1 beIR[25] Line 16 0 1 0 1 bcsLine 14 bcs0 1 1 0 bneg0 10 1 1 1 bvs1 0 0 0 baLine 17 bneg bvs Line 19Figure 6-16 Decoding tree for branch instructions, showing corresponding microprogram lines.If IR[28] is zero, then %ir is shifted to the left by one bit by adding it to itself,so that IR[27] lines up in position IR[13].Bit IR[27] is tested in line 9.IfIR[27] is zero, then the be instruction is executed in line 10, otherwise %ir isshifted to the left and IR[26] is then tested in line 13.The remaining branchinstructions are interpreted in a similar manner.Microassembly Language TranslationA microassembly language microprogram must be translated into binary objectcode before it is stored in the control store, just as an assembly language programmust be translated into a binary object form before it is stored in main memory.Each line in the ARC microprogram corresponds to exactly one word in the con-trol store, and there are no unnumbered forward references in the microprogram,so we can assemble the ARC microprogram one line at a time in a single pass.Consider assembling line 0 of the microprogram shown in Figure 6-15:0: R[ir] ! AND(R[pc],R[pc]); READ; 222 CHAPTER 6 DATAPATH AND CONTROLWe can fill in the fields of the 41-bit microword as shown below:A B CM M MU U U RWA X B X C X D R ALU COND JUMP ADDR10000001000000100101010010100000000000000The PC is enabled onto both the A and B busses for the AND operation, whichtransfers a word through the ALU without changing it.The A and B fields havethe bit pattern for the PC (3210 = 1000002).The AMUX and BMUX fields bothcontain 0 s, since the inputs to these MUXes are taken from the MIR.The targetof the Read operation is the IR, which has a corresponding bit pattern of (3710 =1001012) for the C field.The CMUX field contains a 0 because the input to theCMUX is taken from the MIR.A read operation to memory takes place, and sothe RD field contains a 1 and the WR field contains a 0.The ALU field contains0101, which corresponds to the AND operation.Note that the condition codesare not affected, which would happen if ANDCC is used instead.The CONDfield contains 000 since control passes to the next microword, and so the bit pat-tern in the JUMP ADDR field does not matter.Zeros are arbitrarily placed inthe JUMP ADDR field.The second microword implements the 256-way branch.For this case, all thatmatters is that the bit pattern 111 appears in the COND field for the DECODEoperation, and that no registers, memory, or condition codes are disturbed.Thecorresponding bit pattern is then:A B CM M MU U U RWA X B X C X D R ALU COND JUMP ADDR00000000000000000000000010111100000000000A number of different bit patterns would also work for line 1.For example, anybit patterns can appear in the A, B, or JUMP ADDR fields when a DECODEoperation takes place.The use of the zero bit patterns is an arbitrary choice.TheALU field is 0101 which is for AND, which does not affect the condition codes.Any other ALU operation that does not affect the condition codes can also beused.The remainder of the microprogram is translated in a similar manner [ Pobierz całość w formacie PDF ]
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.The approach usedhere is to shift the COND bits into IR[13] one bit at a time, and then jump todifferent locations in the microcode depending on the COND bit pattern.For branch instructions, the DECODE operation on line 2 of the microprogramtransfers control to location 1088.We need more space for the branch instruc-tions than the four-word per instruction allocation, so line 1088 transfers controlto line 2 which is the starting address of a large section of available control storememory.Lines 2 4 extract the 22-bit displacement for the branch by zeroing the highorder 10 bits and storing the result in %temp0.This is accomplished by shifting%ir to the left by 10 bits and storing it in %temp0, and then shifting the resultback to the right by 10 bits.(Notice that sign extension is performed on the dis-placement, which may be negative.RSHIFT5 implements sign extension.) Lines5 7 shift %ir to the right by 15 bits so that the most significant COND bit(IR[28]) lines up in position IR[13], which allows the Jump on IR[13]=1operation to test each bit.Alternatively, we could shift the COND field toIR[31] one bit at a time, and use the Jump on n condition to test each bit.(Note that there is a subtle error in how the PC is updated in line 12.See Prob-lem 6.21 for an explanation.)Line 8 starts the branch decoding process, which is summarized in Figure 6-16.If IR[28], which is now in IR[13], is set to 1, then the instruction is ba,which is executed in line 12.Notice that control returns to line 0, rather than toline 2047, so that the PC does not get changed twice for the same instruction. CHAPTER 6 DATAPATH AND CONTROL 221Line 8 IR[28]01IR[27] Line 9Line 12 ba01IR[26] Line 13be Line 10cond01branch282726250 0 0 1 beIR[25] Line 16 0 1 0 1 bcsLine 14 bcs0 1 1 0 bneg0 10 1 1 1 bvs1 0 0 0 baLine 17 bneg bvs Line 19Figure 6-16 Decoding tree for branch instructions, showing corresponding microprogram lines.If IR[28] is zero, then %ir is shifted to the left by one bit by adding it to itself,so that IR[27] lines up in position IR[13].Bit IR[27] is tested in line 9.IfIR[27] is zero, then the be instruction is executed in line 10, otherwise %ir isshifted to the left and IR[26] is then tested in line 13.The remaining branchinstructions are interpreted in a similar manner.Microassembly Language TranslationA microassembly language microprogram must be translated into binary objectcode before it is stored in the control store, just as an assembly language programmust be translated into a binary object form before it is stored in main memory.Each line in the ARC microprogram corresponds to exactly one word in the con-trol store, and there are no unnumbered forward references in the microprogram,so we can assemble the ARC microprogram one line at a time in a single pass.Consider assembling line 0 of the microprogram shown in Figure 6-15:0: R[ir] ! AND(R[pc],R[pc]); READ; 222 CHAPTER 6 DATAPATH AND CONTROLWe can fill in the fields of the 41-bit microword as shown below:A B CM M MU U U RWA X B X C X D R ALU COND JUMP ADDR10000001000000100101010010100000000000000The PC is enabled onto both the A and B busses for the AND operation, whichtransfers a word through the ALU without changing it.The A and B fields havethe bit pattern for the PC (3210 = 1000002).The AMUX and BMUX fields bothcontain 0 s, since the inputs to these MUXes are taken from the MIR.The targetof the Read operation is the IR, which has a corresponding bit pattern of (3710 =1001012) for the C field.The CMUX field contains a 0 because the input to theCMUX is taken from the MIR.A read operation to memory takes place, and sothe RD field contains a 1 and the WR field contains a 0.The ALU field contains0101, which corresponds to the AND operation.Note that the condition codesare not affected, which would happen if ANDCC is used instead.The CONDfield contains 000 since control passes to the next microword, and so the bit pat-tern in the JUMP ADDR field does not matter.Zeros are arbitrarily placed inthe JUMP ADDR field.The second microword implements the 256-way branch.For this case, all thatmatters is that the bit pattern 111 appears in the COND field for the DECODEoperation, and that no registers, memory, or condition codes are disturbed.Thecorresponding bit pattern is then:A B CM M MU U U RWA X B X C X D R ALU COND JUMP ADDR00000000000000000000000010111100000000000A number of different bit patterns would also work for line 1.For example, anybit patterns can appear in the A, B, or JUMP ADDR fields when a DECODEoperation takes place.The use of the zero bit patterns is an arbitrary choice.TheALU field is 0101 which is for AND, which does not affect the condition codes.Any other ALU operation that does not affect the condition codes can also beused.The remainder of the microprogram is translated in a similar manner [ Pobierz całość w formacie PDF ]